For the last decades, the tremendous growth in information processing and computation speed was possible by doubling the density of transistors every 1-2 years (following the so-called Moore's Law) resulting in efficient electronic circuits inside our smart TVs, phones and laptops. Since the last decade clock speeds have been capped to prevent processors from overheating and in the past two years the fabrication cost involved with making the very small transistors resulted in an increase in the price tag of transistors: new technologies are required to meet consumers demand to deliver the speed and functionality we come to expect with each generation of (affordable) smart phones, personal computers, and other devices.
One way to increase computing power is to develop new types of low-latency interconnect architectures that enhance upcoming on-chip system architectures, e.g., 3-D IC package, or stacked High-Bandwidth Memories (HBM). Unlike electrons, photons do not create capacitive effects or generate stray electric fields that hamper transmission speeds. Photons are generated, guided, and detected, using optical elements which can have extremely large bandwidths of hundreds of GHz. Unfortunately, photonic interconnects are far too large in size (few cm2) to be integrated with CMOS. There is a critical need for high bandwidth intermediate and global interconnects (similar to photonic elements) with small foot prints (similar to that of CMOS).
Photons generally do not interact with one another and thus do not create capacitive effects to slow down transmission speeds or generate stray electric field which introduces cross-talk between the dense networks of metal lines. Although optical elements, such as dispersion shifted optical fibers, have tremendously large bandwidths of hundreds of GHz, photonic interconnects are far too large in size (typically several cm2) and cannot be readily integrated with CMOS [5]. To overcome this size mismatch, plasmonics is a way forward to reduce the critical dimension of optical components, in principle, far below the optical wavelength compatible with sub-micron Si electronic devices [6, 7]. Here, the information carriers are so-called surface plasmon polaritons (SPPs)—collective surface charge oscillations at the metal-dielectric interface which can be confined to nano-scale structures of 10-100 nm [8]. Plasmonics are promising provided that plasmons can be electrically excited, manipulated, and detected, and transmit information with low losses.
There are two major reasons that hamper the use of plasmonics in integrated circuitry: 1) Efficient methods for plasmon detection and generation are lacking and 2) plasmonics suffers from a trade-off between plasmon-confinement and propagation length. Plasmons are usually excited by bulky light sources (e.g., lasers) [9], inside scanning tunneling microscopes [10-14], or transmission electron microscopes [15-18]. But to exploit the advantages of plasmons in nano-scale electronic circuitry, it is desired to generate, detect, and manipulate, plasmons on-chip by electrical means. Most strategies to develop on-chip electrically driven plasmon sources involve miniaturization of light sources [19, 20], e.g., nano light emitting diodes (LEDs) [21-23], or carbon nanotubes [24], but these approaches rely on slow electron-hole recombination processes resulting in a photon which then excites a plasmon [25]. In contrast, tunneling currents that flow across metal-insulator-metal (MIM) junctions can directly excite plasmons without the need for electron-hole generation [26-29]. Here, tunneling electrons can couple to plasmons within quantum mechanical time-scales [30]. The reverse process when plasmons couple to tunneling currents, the so-called plasmon-assisted tunneling or optical rectification, is also possible and can be used for plasmon detection [31-34]. So far, it is not clear how efficient plasmon excitation or detection via tunneling electrons is. Previous experiments have focused on light excitation via tunneling electrons and suggested it is a low yield process and only an estimated 1 in 104-106 electrons would couple to a photon [26-28] despite that some theories have suggested that 10% efficiencies should be possible [35, 36]. These experiments always measured the number of photons emitted from the junctions (i.e., radiative decay of the plasmons) but likely most plasmons dissipate thermally without emitting a photon resulting in large underestimates of the plasmon excitation efficiency.
Plasmons have unique features and benefits that are appealing for optical signal processing, sensing and imaging [37-39]. However, translation to practical applications of plasmonic materials is hindered by dissipative loss [40]. To overcome this challenge, it is important to develop new techniques for reliable fabrication of optimally designed structures and to advance theoretical understanding to minimize loss. The propagation length and plasmon confinement depends not only on the properties of the plasmonic materials or of the supporting medium, but also on the geometry, the frequency of operation, and the field symmetry of the plasmon mode [41]. More specifically, a large number of structures have been investigated for plasmonic waveguiding, e.g., metallic nanowires or nanostrips [42, 43], thin dielectrics sandwiched between two metals [44], nanogrooves in metal substrates [45], and hybrid plasmonic waveguides of dielectric nanowires placed in close proximity (few nm) to a metal surface [46]. The issue is that the more a SPP mode is confined, the quicker it dissipates. So-called long-range SPPs (LRSPPs) propagate along thin metal strips embedded in a dielectric medium for up to centimeters [47], but these modes are not well confined and can only be used in applications where the interconnects are widely spaced (5 to 10 times the wavelength, or >5-10 μm). Metal-insulator-metal waveguides support highly confined plasmon modes (< 1/10 times the corresponding wavelength in vacuum, λvac) which dissipate quickly and can only propagate on the order of tens of micrometers [48, 49].
Embodiments of the present invention seek to address one or more of the above-mentioned needs.